Verifore will be exhibiting and presenting at Design Solution Forum 2023.
“From How to What – Maximizing the Value of Verification Assets through Abstraction. A Real-World RISC-V Core IP Development Case Study!”
RISC-V continues to gain momentum both domestically and internationally.
Although it is an open-standard ISA, when designing it as a hardware IP, verification is essential to ensure quality, just like any other RTL design.
In this presentation, we will introduce a real-world case study on the functional verification of the Akaria NS family, which supports the RISC-V instruction set. We will showcase a reusable verification environment based on UVM/C (base layer) + Python (test scenario layer) for efficient and scalable verification.
📅 Date: Wednesday, November 22
📍 Venue: Kawasaki City Convention Hall
We look forward to seeing you there!
🔗 DSF Official Website: https://dsforum.jp/2023/
🔗 DSF Event Site: https://client.eventhub.jp/ticket/HgCVtsZJ2O